XOR – The Interesting Gate
Note: The interesting features in XOR and XNOR are somehow the same but with small difference, I’ll speak in details here about XOR and will provide another article for XNOR later.
Among other logic gates, XOR and XNOR are interesting gates having some unique features.
Multiinput XOR
All 2input logic gates have the same meaning when they have more than 2 inputs. For example an AND gate is a gate that outputs 1 when all its inputs are 1, an OR gate outputs 1 when any of the inputs is 1, a NAND gate outputs 0 when all its inputs are 1, a NOR gate outputs 1 when all its inputs are 0.
A 2input XOR gate outputs 1 when there’s exactly a single 1 at the inputs which means it’s exclusively there and that’s from where the name XOR (Exclusive OR) comes. We can alternatively say that it outputs 1 when the 2 inputs are different.
A multiinput XOR gate however doesn’t necessarily have the same meaning as the 2input XOR above. There’re two different interpretations for a multiinput XOR and let’s check that on a 3input XOR as an example:
Interpretation 1
XOR outputs 1 when exactly one of the inputs is 1. This means in other words: either X, Y or Z. Here we are still having the meaning we had in the 2input XOR … the exclusionary.
This interpretation of XOR is sometimes called onehot checker or negative coincidence.
In this interpretation F(X, Y, Z) = XY’Z’ + X’YZ’ + X’Y’Z
Interpretation 2
XOR outputs 1 when there are an odd number of 1’s in the input.
In this interpretation F(X, Y, Z) = XY’Z’ + X’YZ’ + X’Y’Z + XYZ
In this interpretation, the XOR can be used as an odd parity checker of the input and consequently an even parity (bit) generator to that input!
You may also notice that the XOR here acts as if it adds the input bits producing the sum bit with out a carry!
How is each interpretation implemented?
Interpretation 1 must be implemented using the equation given for it above [ F(X, Y, Z) = XY’Z’ + X’YZ’ + X’Y’Z ] … that is using 2level ANDOR circuit design.
Interpretation 2 could also be implemented using its equation [ F(X, Y, Z) = XY’Z’ + X’YZ’ + X’Y’Z + XYZ ] but the interesting thing is that it can be implemented as a tree/chain of XORs.
Here’s how it looks like:
Interpretation 1 
Interpretation 2 
F(X, Y, Z) = XY’Z’ + X’YZ’ + X’Y’Z 
F(X, Y, Z) = XY’Z’ + X’YZ’ + X’Y’Z + XYZ 



It’s obvious how a chain of XORs is equivalent to the second interpretation of 3input XOR.
One more important notice that a multiinput XOR in the second interpretation is associative, that is XYZ = (XY)Z = X(YZ) = (XZ)Y.
The associativity property in the second interpretation makes it possible to have two different designs for a 4bit XOR as shown below:
Interpretation 2 

F=(((XY)Z)W) 
F=(XY)(ZW) 


Both design methods are equivalent 
It’s also the same case that we have different design methods for more than 4input XOR due to the associativity property
XOR the ” Invert or Don’t Invert” tiny circuit
2input XOR gate outputs XY’+X’Y when supplied with the inputs X and Y … what if one of the inputs is 1 or 0?
 1X = X’
 0X = X
That is if X is xored with 0, it passes as it’s and will be inverted if xored with 1.
What if 1/0 is a control signal S? The value of S then will determine if X passes or else its complement.
This way we get a tiny logic circuit that I call “Invert or Don’t Invert” circuit.

XOR Swaps without a temp
A very common trick with XOR is that it can be used to swap the value of two variables without using a third temporary variable. The algorithm follows:
 X = X Y
 Y = X Y
 X = X Y
We can easily prove that:
 X = X Y
 Y = X Y = (X Y) Y = X (Y Y) = X 0 = X ==> Y = X
 X = X Y = (X Y) Y = (X X) Y = 0 Y = Y ==> X = Y
Summary
 MultiInput XOR has two different interpretations unlike all other gates except XNOR.
 The first interpretation of XOR is that it outputs 1 when exactly one of the inputs is 1.
 The second interpretation of XOR is that it outputs 1 when there are an odd number of 1’s in the input. As if it adds the input bits to produce the sum bit without carry.
 MultiInput XOR (Interpretation 2) can be used as an odd parity checker of the input or an even parity (bit) generator to that input.
 Interpretation 2 can be implemented as a chain/tree of XORs.
 XOR can be used as an “Invert or Don’t Invert” circuit.
 XOR can be used to swap the value of two variables without using a third temporary variable.
very helpful post.. thanks..